Wireless transmitter with reduced power consumption

ABSTRACT

This wireless transmitter is composed of at least one modulator, which comprises a digital part and an analog part. The digital part comprises elements for generating the envelope of the signals to be transmitted and elements for generating the phase of the signals to be transmitted.

[0001] This application claims the right of priority under 35 U.S.C. §119 based on French patent applications Nos. FR 02 03704, filed Mar. 25,2002 and FR 03 00517, filed Jan. 17, 2003, which are hereby incorporatedby reference herein in their entirety as if fully set forth herein.

[0002] The present invention relates to a wireless transmitter withreduced power consumption.

[0003] The invention belongs to the field of signal transmission in awireless environment.

[0004] It is well known to persons skilled in the art that thetransmission of signals in a wireless context requires moving a signalfrom baseband to transposed band and using an antenna. A conventionalway of effecting this frequency transposition on transmission as well asat reception is illustrated in FIG. 1.

[0005] The box 110 contains the frequency change stage.

[0006] On transmission, the signal to be transmitted E is buffered by anamplifier 111, then mixed by a mixer 112 with a signal output from alocal oscillator 117. A band-pass filter 113 removes the unwanted imagesfrom the resulting signal. The signal is next amplified, for example bya variable-gain amplifier 120, and then an amplifier 121, generallyreferred to as a power amplifier PA because of the relatively high powerdemand for feeding the antenna 124. A band-pass filter 122 guaranteesthat only the frequencies of interest are transmitted with the greatestpower possible.

[0007] A coupler 123 makes it possible to switch the power received onthe antenna to the reception circuit. This coupler can be a simpleswitch if the system is of the semi-duplex type. From the coupler 123,the signal received drives an amplifier 125, often referred to as a lownoise amplifier LNA 125, because of the low noise characteristic whichthis first amplifier in the reception chain must have to ensure correctreception. A variable attenuator 126 makes it possible to adjust thelevel of the signal received according to the processing which thelatter will undergo subsequently. A band-pass filter 127 makes itpossible to ensure that unwanted images are not created before thefrequency change. The signal next enters a buffer amplifier 116 and isonce again transposed in frequency by a mixer 115, using the signaloutput from the local oscillator 117. Finally, a band-pass filter 114eliminates the unwanted resulting components.

[0008] In conventional applications, the frequency transposition stage110 may be encountered several times, at different frequencies.

[0009] The power amplifiers used as power amplifiers may be class A, Bor AB, according to the linearity required for complete transmission ofthe signal. The efficiency of these amplifiers is marginal when thesignal to be transmitted has a high peak-to-mean ratio (this is thecase, by way of non-limiting example, with an OFDM signal). This isbecause, though a class B amplifier can have an efficiency of 78.5% whenthe signal is sinusoidal and the peak of this sinusoidal causessaturation of the conducting transistor, the same is not the case insmall signal mode, where high energy is necessary to bias the outputstage. A large part of this energy is then lost by heat dissipation andnot transmitted to the antenna.

[0010] There is known, for example through the article by Leonard R.Kahn entitled “Single Sideband Transmission By Envelope Elimination andRestoration”, in Proceedings of the I.R.E., Vol. 40, No. 7, July 1952, atechnique of improving the power consumption, referred to as the E.E.R.(Envelope Elimination and Restoration) technique.

[0011]FIG. 2 illustrates a conventional circuit implementing thistechnique.

[0012] The frequency transposition stage 110 of FIG. 1 is reproduced,which may be multiple. A variable gain amplifier 204 may be used. Theoutput of this amplifier 204 drives a delay application cell 213 and anenvelope detector 205. The output of the delay cell 213 drives anamplitude limiter 208. The output of the envelope detector 205 drives aclass S amplifier 206. A class S amplifier is in fact a variable-widthvoltage to pulse converter. This amplifier 206 drives a low-pass filter207. The assembly 206-207 therefore implements a DC-DC converter whichis agile in voltage. The signal output from the low-pass filter 207serves as a supply rail to the last stage of the power amplifier 209,which amplifies the phase signal output from the limiter 208.

[0013] There is therefore an elimination of the envelope, and thenrestoration thereof by the supply rail of the power amplifier.

[0014] The delay cell 213 makes it possible to guarantee the synchronismof the variations in envelope with respect to the phase identical to theoriginal signal. This synchronism is in fact destroyed by the use of thelow-pass filter 207 and must therefore be re-established. The delay cellmay require appropriate adjustment if the components, in particular thelow-pass filter 207, exhibit a variation in their propagation time,which is the case in mass production.

[0015] The reception path is identical to that of FIG. 1.

[0016] The problem of the delay is amplified if it is chosen to effectthe frequency changes only on the phase, according to an architecture ofthe type illustrated in FIG. 3, in which the elements identical to thoseof FIG. 2 bear respectively the same reference numerals. It will benoted that the frequency transposition stage 110 is this time situateddownstream of the delay cell 213. Such an architecture may proveadvantageous since the frequency transposition may be effected on asignal of relatively low power, which makes it possible to conserveenergy even more. However, the number of components increasing, thescatter in the total propagation time will be greater.

[0017] This problem of delay increases with the ratio between thefrequency of the carrier and the maximum frequency of the envelope.

[0018] There is also known, through the document U.S. Pat. No.5,886,572, a modulation method implementing the E.E.R. technique andalso using a feedback loop which makes it possible to attenuate thedistortions afforded by this technique and may sometimes make itpossible to dispense with the delay cell described above.

[0019] The devices and methods of the prior art implementing the E.E.R.technique in a conventional fashion do not make it possible to obtain asatisfactory reduction in the power consumption while guaranteeingsynchronism of the envelope variations with respect to the phaseidentical to the original signal.

[0020] The aim of the present invention is to remedy the drawbacksmentioned above, by dispensing with the envelope detection cell and theprecise adjustment of the delay cell described above and by makingautomatic the adjustment of the synchronism of the variations inenvelope with respect to the phase identical to the original signal.

[0021] For this purpose, the present invention proposes a wirelesstransmitter composed of at least one modulator, this modulator having adigital part and an analog part, notable in that the digital part haselements for generating the envelope of the signals to be transmittedand elements for generating the phase of the signals to be transmitted.

[0022] This digital part enables the adjustment of the synchronism ofthe variations in envelope with respect to the phase identical to theoriginal signal, to be made automatic.

[0023] Thus the present invention makes it possible to ensure therestoration of the variations in envelope with respect to the phaseidentical to the original signal, in the context of the use of animproved E.E.R. technique.

[0024] It makes it possible to dispense with the use of two of thecomponents of the circuits of the prior art: the envelope detector andthe delay cell mentioned above. This makes it possible to reduce thepower consumption of the circuit. This also allows mass production ofthe corresponding circuit while not requiring any adjustment, even whenthe variations in the various components cause scatter in propagationtime.

[0025] According to a particular feature, the transmitter according tothe invention further has elements for generating a signal carrying thephase information of the signals to be transmitted, which comprise afirst variable delay application cell. These elements process signals ina frequency-transposed domain and do not directly supply the phasesignal of the signals to be transmitted, hence the distinction betweenthe “signal carrying the phase information” and the “phase signal”.

[0026] This variable delay application cell is digital and makes itpossible to advantageously replace all or part of the analog delay cellwhich is found in the prior art. It can be implemented easily from logicgates and flip-flops, and can therefore be integrated at low cost in anASIC (Application Specific Integrated Circuit), an FPGA (FieldProgrammable Gate Array) or a DSP (Digital Signal Processor).

[0027] According to a particular feature, the first variable delayapplication cell is included in the elements for generating the phase ofthe signals to be transmitted.

[0028] According to a particular feature, the transmitter according tothe invention further comprises a class D amplifier, amplifying thesignal carrying the phase information delayed by the first variabledelay application cell.

[0029] According to a particular feature, the class D amplifier issupplied by a signal carrying envelope information corresponding to theenvelope generated by the elements generating the envelope of thesignals to be transmitted.

[0030] The class D amplifier provides a significant saving in the totalenergy dissipated to transmit the signal to the antenna compared withclass A, B or AB amplifiers.

[0031] The variable delay application cell allows resynchronization ofthe envelope and of the phase at the class D amplifier.

[0032] In a particular embodiment, the first variable delay applicationcell comprises:

[0033] a unit for applying a continuously variable delay which is not amultiple of the sampling period used for the digital part of thetransmitter;

[0034] a plurality of delay elements connected in series and connectedto the output of the unit for applying a continuously variable delay;and

[0035] a unit for selecting a total value of the delay.

[0036] It is thus possible to generate a delay which is a multiple ornot of the clock period of the digital system.

[0037] According to a particular feature, the selection unit is adaptedto choose an integer number multiplying the sampling period.

[0038] The implementation of such a variable delay application cell canbe effected by means of simple memory storage operations, withoutrequiring any multiplication.

[0039] According to a particular feature, the envelope generationelements comprise a frequency transposition module, allowing suitabletransmission in a wireless context.

[0040] According to a particular feature, the frequency transpositionmodule comprises at least one digital mixer and at least one digitallocal oscillator.

[0041] Thus the extraction of the phase from the envelope is facilitatedby a first frequency transposition. The digital implementation of thelatter is particularly easy if the first transposition frequency is asubmultiple of the clock frequency of the digital signal.

[0042] According to a particular feature, the digital part furthercomprises:

[0043] a second variable delay application cell;

[0044] a measuring unit adapted to compare a signal obtained from thesignals to be transmitted with an original signal delayed by the secondvariable delay application cell; and

[0045] a control unit connected to the measuring unit and adapted tosupply to the first and second variable delay application cells controlsignals enabling the delays applied by the first and second cells to beadjusted.

[0046] This allows the automatic adjustment of the delay applicationcells, without manual intervention.

[0047] According to a particular feature, the analog part comprises adelay application unit acting on the phase of the signals to betransmitted.

[0048] For the same purpose as that indicated above, the presentinvention also provides a method of adjusting the synchronism of thephase between an original signal transmitted by a transmitter assuccinctly defined above and a signal reconstructed on reception, thismethod being notable in that it is implemented by a control unitincluded in a transmitter as above.

[0049] In a particular embodiment, this adjustment method includes stepsaccording to which:

[0050] a principal value of the phase delay is determined, which is aninteger multiple of a sampling period; and then

[0051] a residual value of this delay is determined.

[0052] According to a particular feature, during the steps ofdetermining the principal and residual values of the delay:

[0053] the two signals compared by the measuring unit mentioned aboveare multiplied with each other; and

[0054] the value of the phase delay is varied until the maximum value ofthe product of these two signals is obtained.

[0055] The present invention also relates to a digital signal processingapparatus comprising a transmitter as above.

[0056] The present invention also relates to a telecommunicationsnetwork comprising a transmitter as above.

[0057] The present invention also relates to a mobile station in atelecommunications network, comprising a transmitter as above.

[0058] The present invention also relates to a base station in atelecommunications network, comprising a transmitter as above.

[0059] The particular features and the advantages of the adjustmentmethod, of the digital signal processing apparatus, of thetelecommunications network, of the mobile station and of the basestation being similar to those of the transmitter according to thepresent invention, they are not stated here.

[0060] Other aspects and advantages of the invention will emerge from areading of the following detailed description of a particularembodiment, given by way of non-limiting example. The description refersto the drawings which accompany it, in which:

[0061]FIG. 1, already described, illustrates schematically a firstconventional radio transceiver and in particular its frequencytransposition stage;

[0062]FIG. 2, already described, illustrates schematically a secondconventional radio transceiver implementing the technique of envelopeelimination and then restoration (E.E.R. technique);

[0063]FIG. 3, already described, schematically illustrates a thirdconventional radio transceiver also implementing the technique ofenvelope elimination and then restoration (E.E.R. technique);

[0064]FIG. 4 illustrates schematically a continuously variable delaycircuit of the prior art, known as a “Farrow cell”;

[0065]FIG. 5 illustrates schematically the analog part of a transmitteraccording to the present invention, in a particular embodiment;

[0066]FIG. 6 illustrates schematically the digital part of a transmitteraccording to the present invention, in a particular embodiment;

[0067]FIG. 6a illustrates schematically the digital part of atransmitter according to the present invention, in a variant of theembodiment of FIG. 6;

[0068]FIG. 7 is a circuit illustrating the principle of the adjustmentof the delay in the digital part of the transmitter of FIG. 6;

[0069]FIG. 8 is a flow diagram illustrating the principle of theadjustment of the delay in the digital part of the transmitter of FIG.6;

[0070]FIG. 9 is a flow diagram illustrating the adjustment of thesynchronism of the phase between the original signal and thereconstructed signal, in accordance with the present invention, in aparticular embodiment;

[0071]FIG. 10 is a flow diagram illustrating the adjustment of thesynchronism of the envelope and of the phase between the original signaland the reconstructed signal, in accordance with the present invention,in a particular embodiment;

[0072]FIG. 11 depicts, in a simplified schematic form, atelecommunications network according to the present invention;

[0073]FIG. 12 is a graph illustrating the gain of a class D amplifier asa function of the voltage applied to its power supply, when theamplifier is used in a transmitter in accordance with the presentinvention; and

[0074]FIGS. 13a and 13 b illustrate two possible embodiments of ananalog circuit providing a linearization by feedback when it is situatedin a transmitter in accordance with the present invention.

[0075] The transmitter according to the present invention comprises ananalog part and a digital part, illustrated respectively in FIGS. 5 and6.

[0076] As shown by FIG. 5, the phase signal P follows a path where afrequency transposition stage 500 is reproduced, of the type describedin relation to FIG. 1. The signal P is first of all buffered by anamplifier 503, then mixed by means of a mixer 504 with the signal outputfrom a local oscillator 513. A band-pass filter 505 placed at the outputof the mixer 504 removes unwanted images from the resulting signal.

[0077] The signal envelope Env is sent to a class S amplifier 501. Thisamplifier drives a low-pass filter 502. The signal output from thelow-pass filter 502 serves as a supply rail for the last stage of apower amplifier 507, which amplifies the phase signal output from theband-pass filter 505. There is therefore elimination of the envelope,and then restoration thereof by the supply rail of the power amplifier507, which is a class D amplifier. Optionally, a band-pass filter 508can be provided at the output of the power amplifier 507. An antenna 510transmits the resulting signal.

[0078] A coupler 509 makes it possible to switch the power received atthe antenna 501 to the reception circuit. From the coupler 509, thereceived signal drives a low noise amplifier (LNA) 516. A variableattenuator 515 makes it possible to adjust the level of the signalreceived according to the processing which the latter will undergosubsequently. After this stage, a band-pass filter 517 makes it possibleto dispense with the potential frequency images due to the demodulation.The signal then enters a buffer amplifier 514 and is once againtransposed in frequency by a mixer 512, by means of the signal outputfrom the local oscillator 513. A band-pass filter 511 placed at theoutput of the mixer 512 eliminates the resulting unwanted components.

[0079] In conventional applications, the frequency transposition stage500 may be encountered several times at different frequencies.

[0080] Optionally, a delay application cell 520 can enable thesynchronism between phase and envelope to be adjusted to the bestpossible extent, without however requiring high precision and withoutneeding to compensate for the variations due to the components by meansof an adjustment. The delay cell 520 can easily be dispensed with, inwhich case it suffices to provide more memory cells in the digital partdescribed below.

[0081]FIG. 6 illustrates the digital part of the transmitter accordingto the present invention, situated upstream of the analog partillustrated in FIG. 5.

[0082] To obtain the envelope of the signal, in the particularembodiment described here, a first transposition frequency is created.This is not limiting: it is possible to calculate the final envelopefrom the baseband signal.

[0083] This first frequency transposition is performed, by way ofexample that is in no way limiting, by filtering of the real part I ofthe signal by means of an FIR (Finite Impulse Response) filter 601 andby filtering of the imaginary part Q of the signal by means of an FIRfilter 606. The signals output from the filters 601 and 606 aremultiplied, respectively by means of digital mixers 602 and 610, by thesignal output from a digital local oscillator 628, offset in phase by900 for the imaginary part Q, and are then added by an adder 611. As avariant, it is possible to use a Hilbert filter, known to personsskilled in the art, in order to perform the same function.

[0084] The signal envelope is created in a unit 603 which determines theabsolute value of the signal leaving the adder 611. A digital to analogconverter 604 and a low-pass filter 605 complete the transformation ofthe signal from the digital domain to the analog domain.

[0085] In order to create a phase signal, the signal output from theadder 611 enters a Farrow cell 692, which is a Continuously VariableDigital Delay circuit (CVDD) as disclosed in document U.S. Pat. No.4,866,647.

[0086] Such a Farrow cell is illustrated in FIG. 4.

[0087] It comprises four identical subcells 40, 42, 44 and 46. Thesubcell 40 is an FIR digital filter with four coefficients. It consistsof three delay introduction elements 400 and four amplifiers ormultipliers with fixed coefficients 402. The respective values of thesecoefficients are b30, b31, b32 and b33. Three adders 404 make itpossible to sum the outputs of the amplifiers 402. The output of thesubcell 40 is multiplied by a coefficient α by means of a multiplier 48.

[0088] Because of the multipliers 48 and the adders 50 placed at theoutput of the subcells 40, 42, 44 and 46, the output of the Farrow cellis a digital signal${{y(k)} = {{\sum\limits_{l = 0}^{3}\quad {\alpha_{k}^{l}{v(l)}\quad {with}\quad {v(l)}}} = {\sum\limits_{i = 0}^{3}\quad {x\left( {m_{k} - i} \right)}}}},$

[0089] where x is the digital signal entering the Farrow cell and m_(k)and k are integers representing multiplying factors of the timedifference between two samples.

[0090] This forms an interpolator polynomial having α as a variable. Byacting on the coefficient α, it is possible to interpolate the incomingsignal according to the polynomial function chosen as a coefficient ofthe filters. In the embodiment described here, a Lagrange interpolationis used. This interpolator will make it possible to obtain a delay onthe phase signal compared with the envelope signal which is not amultiple of the period of the sampling clock used in this digitalprocess.

[0091] An assembly 680-2 is composed of the Farrow cell 692 and acertain number of delay elements 681, each introducing a delay with aduration equal to a period T of the sampling clock. A selector 682 makesit possible to choose an integer number multiplying the duration of thedelay T. The assembly 680-2 therefore makes it possible to obtain adelay which is not a multiplication of the period of the sampling clockby an integer number. It is thus possible to ensure synchronism of thesignals on reconstruction, whatever the scatter due to the variations inthe components.

[0092] At the output from the selector 682, a signal is created whichcarries the phase information, in a unit 625. Throughout the remainderof the text, the misnomer “phase signal” will be used to refer to thissignal.

[0093] The phase signal can simply be obtained by extracting the sign ofthe signal output from the assembly 680-2 if the frequency of the firstfrequency transposition is chosen so as to be equal to the result of thedivision by 4 of the sampling frequency. As a variant, the phase signalis obtained by amplitude limitation of the signal output from theassembly 680-2.

[0094] The phase signal next enters a digital to analog converter 626and then a low-pass filter 627. The converter 626 can be very simple: itmay for example create the voltage values +V, 0 and −V if the samplingfrequency has been chosen to be a multiple of the first carrierfrequency. It may therefore be implemented by means of elementary logicgates.

[0095] In order to compare the original signals and those reshaped bythe power amplifier 507 of FIG. 5, it is necessary to create a pathwhich is delayed by means of a first delay system 680-1 and additionaldelay elements 682. The principle of the delay system 680-1 is identicalto that of the assembly 680-2. This delay is in fact advantageouslyadjustable since the time required for passing over the reception pathis not negligible.

[0096] The original signal thus delayed enters a measuring unit 623,where it is compared with the reconstructed signal which comes from thereception chain and which was sampled by an analog to digital converter624. An adjustment in gain may be made by means of the coefficient β ofa multiplier 629. The result of the measurement supplied by themeasuring unit 623 makes it possible to obtain, in a control module 612,control signals for adjusting the delay elements 680-1 and 680-2.

[0097]FIG. 6a illustrates the digital part of the transmitter inaccordance with the present invention in a variant giving an improvementwith respect to the particular embodiment of FIG. 6.

[0098] The propagation of radio waves is inversely proportional to apower of their frequency, the value of the exponent representing thatpower being different according to the models adopted. To obtainsufficient distances between the transmitter and receiver, the powerrequired at the antenna for the high frequencies used (for example 5GHz) may be considerable. In the non-limiting example of application ofthe invention to signals modulated according to an OFDM type modulation,the amplitude of the OFDM signals is then such that it is difficult tofind components that are sufficiently linear to ensure the reproductionof the weak and strong amplitudes of the OFDM without distortion, moreespecially in the architecture of a class D amplifier, where the voltageof the amplifier's power supply, which is controlled by the envelope ofthe signal to be transmitted, is the parameter which governs the valueof the amplification applied to the phase of the signal to betransmitted.

[0099] To remedy this problem, the invention provides, on the one hand,intervention on the amplifiers themselves in the analog domain, byaddition of hardware, for the purpose of a linearization by feedback(illustrated in FIGS. 13 a and 13 b described below) and, on the otherhand, intervention in the digital domain, by addition of a look-up tableto the samples representing the envelope.

[0100] The graph of FIG. 12 illustrates the gain of a class D amplifieras a function of the voltage applied to its power supply. A relativegain is represented along the Y-axis and a relative voltage isrepresented along the X-axis. The straight line represents the idealcase, the curve having weak oscillations around the straight linerepresents the gain obtained taking into account a quantization over 7bits and the other curve, which is dashed, represents the measured gain.

[0101] When the calculated value of the envelope is equal to A it can beseen that it is necessary to produce the value B to obtain the correctedvalue along the Y-axis of the deviation due to the real amplifier.

[0102] In the case of the gain curve really obtained, it can be seenthat the error introduced is substantially less, thanks to thecorrection by transposition applied to the samples representing theenvelope, as mentioned above. It should be noted that this curve ispurely indicative, since it depends on a choice to perform thedigital-analog conversion. This curve is given here by way ofnon-limiting example.

[0103]FIG. 6a shows the location of the look-up table 650 or LUT in thedigital part of the transmitter in accordance with the presentinvention. All the other elements bear the same reference numerals as inFIG. 6 since they are identical and will thus not be described againhere. The look-up table 650 is placed between the unit 603 forcalculating the absolute value and the digital-analog converter 604. Thetable may be made using a read-only memory, of which the addresses comefrom the unit 603 for calculating the absolute value and whose datacontrol the digital-analog converter 604.

[0104] This transposition is calculated once and for all at the time thecircuits are produced. This is made possible by the fact that it is notenvisaged to digitally correct the deviations due to temperature. Forthat, the methods in the analog domain are more appropriate.

[0105] Thus, FIG. 13a illustrates a feedback loop which makes itpossible to ensure the fidelity of the signal with respect to itssetting, which is the envelope of the signal to be transmitted. Acapacitor and an inductor form a low-pass filter. A first transistormakes it possible to power a second transistor, which is the amplifieron which the modulation is reconstructed.

[0106] In FIG. 13b, the same mounting is used with an oscillator, ofwhich the cyclic ratio is driven by the amplifier. This second solution,using a class S amplifier, consumes less power than the first solution,illustrated by FIG. 13a. It requires a value of capacitance such thatthe current is sufficient to power the modulating transistor. Thecapacitor participates in the low-pass filtering, the value of thecapacitance is also constrained by the passband. As far as possible, acompromise is thus to be found.

[0107] In the solutions of FIGS. 13a and 13 b, in variant form, thefeedback loop may also be measured on a filter which would be insertedon the source of the modulating transistor.

[0108] The outline diagram in FIG. 7 illustrates the determination ofthe delay in the digital part of the transmitter in FIG. 6. In FIG. 7,to simplify, a representation of the analog to digital and digital toanalog conversions has intentionally be omitted, as well as thefrequency transpositions (direct and inverse).

[0109] The variable delay application units 713 and 714 representrespectively the modules 680-1 and 680-2 of FIG. 6. The amplificationunit 715 represents all the operations undergone by the phase signaloutput from the variable delay application unit 714, including itsamplification by the envelope signal calculated by the envelope detectorand generator 711, from the original signal created by the signalgenerator 710. The unit 716 represents the delay detection andadjustment system and represents in particular the measuring unit 623 ofFIG. 6. The unit 712 represents the phase detector.

[0110] The adjustment system 716 is capable of acting independently onthe variable delay application unit 714 and on the variable delayapplication unit 713. This adjustment system 716 is supplied on the onehand by the original signal delayed by the unit 713 and on the otherhand by the copy of the signal reconstructed at the amplifier 715.

[0111] As the demodulation causes a delay, this delay is first of allcompensated for on a signal where only the phase undergoes changes inappearance, by means of the variable delay produced by the unit 713.Then the same operation is performed on a signal where only the envelopeundergoes changes in appearance, by imposing a delay valuesimultaneously on the variable delay application unit 714 and on thevariable delay application unit 713.

[0112] The flow diagram in FIG. 8 illustrates the correspondingsuccession of steps.

[0113] During a first step 80, it is sought to determine the integerpart (relative to the sampling rate) of the delay undergone by the phasealone.

[0114] Then, during a step 82, it is sought to determine the fractionalpart of this same delay.

[0115] For this purpose, the delay applied by the unit 713 to the signaloutput from the signal generator 710, which is a signal with a constantenvelope, consisting of a phase-modulation sinusoid, is adjusted.

[0116] To this end, the two signals entering the unit 716 of FIG. 7 (orthe unit 623 of FIG. 6) are multiplied and the delay is adjusted untilthe maximum value of the product of the two signals is obtained. Theobtaining of this maximum corresponds to the appropriate value of thedelay to be applied in the unit 713.

[0117] During the following step 84, it is sought to achieve asynchronous detection of the delay of the envelope, for the integer partof this delay (relative to the sampling rate). Then, during a step 86,it is sought to achieve a synchronous detection of this same delay forits fractional part.

[0118] For this purpose, the delay applied by the unit 714 is adjusted,this time by seeking the minimum value of the result of the subtractionof the two signals entering the unit 716 or 623. This minimum isobtained when the correct value of the delay is programmed in the unit714.

[0119] The step 88 in FIG. 8 represents the obtaining of the correctvalues of the delays to be applied in the modules 680-1 and 680-2 ofFIG. 6.

[0120] To detect the delay on the phase of the reconstructed signal, itis possible to use, by way of non-limiting example, a signal consistingof a sinusoid modulated by phase jump, with a constant envelope, that isto say f(t)=A×cos(ω×t+φ(t)). The reconstruction of this signal has anidentical frequency and is of the form f′(t)=A′×cos(ω×t+φ′(t)). Whenthese signals are multiplied,f(t)×f′(t)=A×A′×((½)cos(φ(t)−φ′(t))+(½)cos(2×ω×t+φ(t)+φ′(t))) isobtained. This quantity is positive if and only if φ(t)=φ′(t). Thedetection of negative samples therefore makes it possible to deducetherefrom that phase alignment is not obtained.

[0121] The flow diagram in FIG. 9 illustrates the method of adjustingthe synchronism between the original phase and the phase of thereconstructed signal. During an initialization step 900, a variable i isinitialized to the value 0. Then, during a step 902, the phase signal istransmitted.

[0122] During the following step 904, a maximum detection operationconsists of multiplying the signals entering the unit 716 (FIG. 7) or623 (FIG. 6). A test 906 makes it possible to check whether a localmaximum is attained when action is taken conjointly on the cells 680-1and 680-2, on the choice of integer delays, multiples of the period ofthe sampling clock, using the selector 682 (FIG. 6) for the cell 680-2or using a similar selector present in the cell 680-1.

[0123] As long as a local maximum is not attained, the variable irepresenting the multiplication factor of the sampling clock period isincremented by one unit during a step 908.

[0124] When the maximum is attained or even exceeded, during a step 910,a process of adjusting the coefficient α which drives the Farrow cell692 is initialized, by decrementing the variable i by one unit andinitializing the coefficient α to the value 0. The following steps 912and 914 are respectively similar to the steps 904 and 906 describedpreviously. As long as the maximum is not attained, the value of thecoefficient α is increased by a predetermined step size during a step916. The process stops when the maximum is attained or even exceeded.

[0125] In the event of exceeding of the maximum value, a backward step918 is performed during which the value of α is decremented by one stepsize so as to obtain the optimum coefficient α₀, corresponding to theoptimum multiplication factor i₀ equal to the current value of thevariable i.

[0126] In the embodiment described here, a step by step method istherefore applied for adjusting the selector of the delay system 680-1.However, it would be just as possible to vary the step size towardsfiner and finer values, or to use a dichotomic process.

[0127] At the end of the adjustment, the coefficients obtainedmultiplying the duration of the delay T in the delay system 680-1 arestored and serve as a starting point for the latter. The assembly 680-2begins to function with zero coefficients.

[0128] As soon as the phase match between the original signal and thereconstructed signal is obtained, a second adjustment operation isperformed conjointly on the cells 680-1 and 680-2 using an operation ofsubtracting the two signals entering the unit 716 (FIG. 7) or 623 (FIG.6). The gain β, which is the coefficient of the multiplier 629 of FIG.6, is then varied until a minimum value of the result of the subtractionis detected.

[0129] For the detection of the synchronism of the envelope and phase,the delays introduced by the two delay cells 680-1 and 680-2 are thenvaried conjointly until matching is obtained between the original signaland its reconstruction, as illustrated by the flow diagram in FIG. 10.

[0130] It should be noted that, when the delay of the cell 680-2 (FIG.6) or 714 (FIG. 7) is adjusted, it is necessary to vary concomitantlythe delay introduced by the cell 680-1 (FIG. 6) or 713 (FIG. 7), sincethe delay introduced by the cell 680-1 corrects an absolute delaybetween the phase signal and the copy of the signal used for themeasurement, while the delay introduced by the cell 680-2 corrects onlythe difference in synchronization between the phase and the envelope.The problem is therefore posed of maintaining the absolute delay betweenthe phase signal and the copy of the signal used for the measurement,while the delay of this phase signal is precisely made to vary. This isthe reason why it is necessary to vary at the same time the delaysapplied by the cells 680-1 and 680-2.

[0131] As shown by FIG. 10, during an initialization step 1000, there isallocated to the variable i, which is the multiplication factor for thesampling clock period for the selectors of the cells 680-1 and 680-2,respectively the value i₀ determined previously, for the cell 680-1, andthe value 0 for the cell 680-2.

[0132] Next, during a step 1002, the envelope signal and the phasesignal are transmitted. During the following step 1004, a signal isdetected by subtracting the two signals entering the unit 716 or 623. Bymeans of a test 1006, the minimum thereof is sought and, as long as thisminimum has not been attained, the variable i of the selectors of thecells 680-1 and 680-2 is incremented by one unit, during a step 1008.

[0133] At step 1010, the minimum is attained, or even exceeded. In theevent of it being exceeded, the value of i is decremented by one unit.Then the process is commenced of step by step optimization of thecoefficient α on the Farrow cells of the cells 680-1 and 680-2 from thevalue α₀ for the cell 680-1 and in accordance with steps 1012, 1014 and1016 similar to steps 1004, 1006 and 1008 described above. If theoptimum value of α is exceeded, at step 1018, the value of α is reducedby one step size. At the end of step 1018, the whole of the system issynchronized.

[0134] As shown by FIG. 11, a network according to the inventionconsists of at least one station known as a base station SB designatedby the reference 64, and several peripheral stations known as mobileterminals SPi, i=1, . . . , M, where M is an integer greater than orequal to 1, respectively designated by the references 66 ₁, 66 ₂, . . ., 66 _(M). The peripheral stations 66 ₁, 66 ₂, . . . , 66 _(M) aredistant from the base station SB, each connected by a radio link withthe base station SB and able to move with respect to the latter.

[0135] The base station 64 can comprise means adapted to implement atransmission-reception method according to the invention. As a variant,the base station 64 can comprise a transceiver according to theinvention. In a similar fashion, at least one of the mobile terminals 66_(i) can comprise means adapted to implement a transmission-receptionmethod according to the invention or comprise a transceiver according tothe invention.

[0136] It will be observed that the invention makes it possible toextend the E.E.R. architecture when several frequency transpositions arenecessary. This significantly reduces the energy consumption of atransmitter.

1. Wireless transmitter composed of at least one modulator, saidmodulator comprising a digital part and an analog part, wherein thedigital part comprises means of generating the envelope of the signalsto be transmitted and means of generating the phase of the signals to betransmitted, wherein said transmitter further comprises means ofgenerating a signal carrying the phase information of the signals to betransmitted and wherein the means of generating the signal carrying thephase information of the signals to be transmitted comprise a firstvariable interpolation cell.
 2. Transmitter according to claim 1,wherein the first variable interpolation cell is comprised in the meansof generating the phase of the signals to be transmitted.
 3. Transmitteraccording to claim 2, further comprising a class D amplifier, amplifyingthe signal carrying the phase information delayed by the first variableinterpolation cell.
 4. Transmitter according to claim 3, wherein theclass D amplifier is supplied by a signal carrying the envelopeinformation corresponding to the envelope generated by the means ofgenerating the envelope of the signals to be transmitted.
 5. Transmitteraccording to claim 1, wherein the first variable interpolation cellcomprises: means of applying a continuously variable delay which is nota multiple of the sampling period used for said digital part; aplurality of delay elements connected in series and connected to theoutput of said means of applying a continuously variable delay; andmeans of selecting a total value of the delay.
 6. Transmitter accordingto claim 5, wherein said selection means are adapted to choose aninteger number multiplying the sampling period.
 7. Transmitter accordingto claim 1, wherein the envelope generation means comprise frequencytransposition means.
 8. Transmitter according to claim 7, wherein thefrequency transposition means comprise at least one digital mixer and atleast one digital local oscillator.
 9. Transmitter according to claim 1,wherein the digital part further comprises: a second variableinterpolation cell; measuring means adapted to compare a signal obtainedfrom the signals to be transmitted with an original signal delayed bysaid second variable interpolation cell; and control means, connected tosaid measuring means and adapted to supply, to said first and secondvariable interpolation cells, control signals for enabling the delaysapplied by said first and second cells to be adjusted.
 10. Transmitteraccording to claim 1, wherein the analog part comprises delayapplication means acting on the phase of the signals to be transmitted.11. Method of adjusting the synchronism of the phase between an originalsignal transmitted by a transmitter according to claim 1 and a signalreconstructed on reception, said method being implemented by controlmeans comprised in a transmitter according to claim
 9. 12. Methodaccording to claim 11, comprising steps according to which: a principalphase delay value is determined, which is an integer multiple of asampling period; and then a residual value of said delay is determined.13. Method according to claim 12, wherein, during steps of determiningthe principal and residual values of said delay: the two signalscompared by said measuring means are multiplied with each other; and thevalue of the phase delay is varied until the maximum value of theproduct of said two signals is obtained.
 14. Digital signal processingapparatus, comprising a transmitter according to claim
 1. 15.Telecommunications network, comprising a transmitter according toclaim
 1. 16. Mobile station in a telecommunications network, comprisinga transmitter according to claim
 1. 17. Base station in atelecommunications network, comprising a transmitter according to claim1.